Thin film transistors (TFT) are the basic building blocks of large area electronic circuits such as those used in the backplanes of active matrix liquid crystal displays (AMLCD) of the type often used in flat panel monitors and televisions. In these applications, TFT circuits are used to control the activation of pixels that make up the display. Thin film circuits may be produced over non-planar surfaces. They may be fabricated on flexible substrates. And, in some applications, they may be required to be optically transparent to the visible light. Because of these unique application-specific requirements conventional transistors made on single crystal substrates cannot generally be used.
Historically, TFTs have been made from amorphous silicon (a-Si) films to satisfy the unique requirements of the applications described above, rather than the single crystal Si typically used with conventional electronic circuits such as microprocessor circuits of modern computers. Transistors made from a-Si, however, suffer from a number of deficiencies including low electron mobility, light sensitivity operation, limited switching ratios, and poor threshold voltage uniformity. These deficiencies make a-Si TFTs unsuitable for contemporary display circuit applications that demand higher switching speeds and accuracy.
In recent years, metal-oxide semiconductors have been considered good candidates for display electronics applications. In particular, for thin film applications, several semiconductors (Zn, In, Sn, Ga, and Hf) containing metal-oxides have shown good promise. One of the most promising metal-oxide semiconductors for thin film and transparent transistor applications is ZnO, which is transparent because of its wide band gap (3.4 eV), has high thin film electron mobility, and can be easily prepared by several deposition techniques. ZnO thin film transistors have also been shown to be suitable for high performance circuit applications beyond display electronics because of their superior electronic properties. Some of these applications include microwave signal amplification, switching and mixing, high speed logic circuits and high speed control electronics. Other metal-oxide based thin film semiconductors are mostly useful when they are a mixed combination of several metal-oxides. For example, indium zinc oxide (IZO) or indium zinc gallium oxide (IGZO) are ternary and quarternary compound semiconductors whose exact composition must be carefully controlled in manufacturing. On the other hand, ZnO is a simple binary compound and its composition may be readily controlled in a manufacturing environment. This contributes to ZnO-based circuits being both high in performance and low in manufacturing cost.
In a transparent transistor, all layers used in the construction of the transistor must be highly transparent, meaning that the optical transparency of each layer must be better than 90 percent. When ZnO is used as the building material for transparent transistors, the transparency requirement can be easily met. In a transparent ZnO transistor, all the contact layers are made of doped ZnO layers, whereas the channel layer is made of undoped ZnO. ZnO can be doped with small amounts of Al or Ga during the film growth. In a ZnO thin film field effect transistor, the gate insulator may be made from a wide range of insulating films such as silicon dioxide, aluminum oxide, hafnium oxide, etc. These films have very large bandgaps and therefore are also highly transparent. ZnO transparent thin film transistors (TTFT) are typically fabricated with gate contact at the bottom, i.e., bottom gate structure. They can also be fabricated with the gate contact on the top, .i.e., top gate structure. For simplicity, bottom gate structures will be discussed, though any of the innovations may also be applied equally well to top gate type transistors.
In a bottom gate TTFT 10, as shown schematically in FIG. 1, the first layer to be fabricated on a transparent substrate 12 is the conductive gate layer 14. Other layers are fabricated over this layer in sequence during fabrication, namely gate insulator layer 16, channel layer 18, and source 20 and drain 22. Unwanted portions of each layer are removed by etching while protecting the portions of the layer with protective films such as photoresist. A major difficulty in ZnO TTFT manufacturing is the fabrication of the source 20 and drain 22 contacts over the undoped channel layer 18. Compositionally, these two layers are almost identical and therefore have almost identical etch rates in chemical etchants such as diluted acids. It is therefore not possible to selectively remove the portion of the top doped ZnO layer to fabricate source 20 and drain 22 contacts without destroying the underlying undoped channel layer 18.
Because of etch non-selectivity between the top conductive layer and the undoped channel layer, a common fabrication approach is to make use of physical masks, typically made of thin metal layers, to shield the portion of the surface during layer deposition where separation between source and drain contacts is desired. This method has several drawbacks including the exposure of the undoped channel ZnO layer to atmosphere to facilitate the placement of the physical mask on the wafer. Contamination of surface layer degrades the interface between the doped and undoped layers and results in inferior devices. Second, the physical mask layer fabrication has severe limitations in the feature sizes that can be used. Instead of the desired dimensions on the order of micrometers, this method is only capable of producing devices with feature sizes of millimeters. Additionally, placement accuracy of the physical mask over the wafer is not well controlled, which may result in gross errors in registering contact layers with respect to each other.
A method of overcoming this problem was described in U.S. Publication Numbers 2010/0304528 A1 and 2010/0065837 A1. According to the method described, a protective insulating layer is produced over the undoped channel layer first. Portions of this layer are removed in a dry etch process without removing the underlying undoped ZnO channel layer. Doped contact layers are produced over the protective layer and allowed to make contact with the undoped channel layer in the regions where the protective layer was previously removed by dry etching. However, the dry etch process causes damage to the undoped channel layer, which must be repaired by high temperature annealing.
What is needed in the art, therefore, is a method of fabricating thin film transistors without the drawbacks or difficulties associated with contemporary fabrication methods.